Posts in category Q2

Blog 6: Exams, Project, Results (and a new Quarter)


I’m back after an eventful period of 4 weeks. Lots of things have taken place, so let me get on with it.

Firstly, I had the preparations for the exams and the exams themselves. I spend quite a lot of time going through all the material and trying to remember it all. I started with my oral exam for Methods and Systems for Algorithm Design. I was quite worried for this one; I don’t like to do oral exams (I’m more comfortable with written exams) and there was one chapter that I didn’t fully unerstand. Nevertheless, I was, in my opinion, well-prepared, and as long as I stayed calm there shouldn’t be a problem. Before the actual exam, I had 45 minutes to prepare myself for one of the chapters; ofcourse I got the topic I only understood that morning:P Luckily, I at least understood the topic (for the ones interested: Retiming, which is basically a method to move registers in combinational circuits in order to improve the performance, area usage and/or power dissipation of the circuit), and the preparation went quite well. Eventhough I was able to go over all the material in that 45 minutes, I was still quite nervous. Me being nervous caused me to not answer the questions as good as I hoped, but it still went reasonably well. The paper presentation went pretty well, since I knew and understood all of the contents. The lab wasn’t so much touched upon, but the professors saw I had invested time in it, and told me it was sufficient. After waiting for 3 minutes, they called me back in the room and told me I got an 8 and that the lab was finished. I was so happy with that:) One down, two more to go I thought:)

Example of retiming (clock frequency is doubled by retiming the top circuit (source:–P6dGm4/TfDag9qsqII/AAAAAAAAABU/wfkACvvt4UI/s640/Retiming.png)

Three days later, that Friday, I had another exam: Performance Analysis. I think I still prepared myself quite well, although I went over all the horrible mathematical equations in the book without really remembering (and sometimes understanding) them. The day before the exam I practiced with the available practice exams, which went quite well, so I was quite confident. The exam itself took place at 9:00, which is quite early compared to the days before where I could sleep late(r):P I read the exam questions and I was happy. Except a really tough question 1, the questions were quite doable. It took me longer than expected though; I finished after 2 hours and 40 minutes, where I thought 2 hours would be enough. Afterwards, I discussed the exam with some friends, and we came to the consensus that it was definitely doable and passable. I got my result last week (I also looked at the answer last week): a 7.5:) I have to admit, after the initial happiness of passing the course, I was a bit disappointed; I think at least an 8 should have been doable, although a 7.5 is rounded up to an 8:) I don’t think I will do the re-exam for this course, unless my next exam period is relaxed haha! Anyway, two down and one more to go.

5 days later, on Wednesday, I had my last exam: Digital IC Design. I went over all the slides, I looked a bit in my book and printed (quite a lot of) useful slides. The day before the exam, I practiced with 5 practice exams, which all went reasonably well. What I noticed was that most of the time, the answers should be brief rather than long. I wish I would have taken this with me in the exam; during the exam I took a bit too much time for the questions I should have been able to answer brief and fast. On top of that, I was really confused at one question on which I spent at least 45 minutes, untill the assistants corrected an error in the question on the blackboard; the question now made sense to me, unfortunately I had spent so much time already :'(. During the whole exam, I felt the clock ticking, and I saw that I would end up in need for time. The last half hour I managed to answer 3 questions, albeit not to the best of my abilities. I don’t have the result yet; I can only hope to have an acceptable grade (really no idea if a 6 would be possible; let’s hope:)).

Last week, between the exam period of Q2 and the start of Q3, there was a week without any lectures –> Holidays! However, in my case I would call it normal week without lectures, or similarly, Project week. Why?! you might ask yourself; I have spent 4 out of the 5 days at the campus, together with my colleague, to work on the IC design project. The other day, I went to the dentist for a root canal treatment (which really wasn’t fun either;)). We had postponed all the project work until after the exams, so it really was needed. We first finalized the design of our TDC, before we went on with creating the remainder of the cells. At the moment we have a working architecture for the TDC with a resolution of 5 ps (which we are really happy with). Unfortunately, due to some (design) drawbacks, which took us quite some hours to fix, our design is a lot bigger in terms of area than expected. We have some things planned for this week (deadline of the final report is this Friday, the 12th of February): first assemble the whole TDC, including the counter, multiplexers and encoders, then simulate and simulate (and simulate and …) until we have what we need and finally we will finish writing the final report. We still haven’t given up yet on doing the layout, but it seems rather grim, seeing that we have only 4 days to go with quite some work to do.

For the ones interested in our TDC design: I won’t give all the details, but I can say that it is based on a ring oscillator augmented with a counter (for decreasing the amount of buffers/inverters in the ring oscillator). Since the resolution of just a ring oscillator will not go much lower than 20 ps, my colleague and I have designed a mechanism to enable a resolution of 5 ps (albeit at a large area cost:().

Example of a ring oscillator. The timing diagram shows that each subsequent output is delayed. This can be used in a TDC to measure the time between two pulses, by letting one pulse propagate in the ring oscillator (and counting through how many stages, or inverters, the pulse has propagated), until the second pulse goes up too. The amount of stages the signal has propagated through times the delay of one stage is the total measured time. Source:

Q2 has almost finished, finally I must say;) However, Q3 has already started as of today. But I’ll tell you about Q3 in my next blog. You can expect it to be here before the start of March;) For now, I’m off to finish my project:P Cheers!:D

Blog 5: Back to reality (and exams)

Hi y’all,

let me get the formitality out of the way;) I wish you all a very happy New Year and I hope all your wishes will come true. I hope to see some of you at the TU Delft at the end of this year, where you have just started your Master Computer Engineering (a man can dream:P). Anyways, the holidays have unfortunately ended and I’m back to reality. But before I talk about reality, let me talk about my holidays:D

Christmas was really nice; first Christmas day I had dinner with my father, brother, sisters and following, and on the second day I travelled all the way to Limburg (south-east of the Netherlands, known for Maastricht probably) to see my family.  New Year’s Eve wasn’t spectacular (however nor am I); I went to some friends and played an old Dutch game called “Sjoelen” (see the picture:)) and afterwards a friend came over and we played some games:) Oh, before that, I made the typical Dutch treat “Oliebollen”, which can be described as a ball of dough, with raisins, fried in oil. They were delicious haha. For the rest: I went to the (Charles) Dickens’ Fest in Deventer, I went ice skating in Rotterdam, I did karting and lasergaming in Den Haag.S490000-1-Sjoelbak-voor-senioren

(Old Dutch game “Sjoelen”. Get the stones in one of the 4 holes (2, 3, 4, 1 points respectively))


(Oliebollen (not the ones I made unfortunately:())

That was the fun stuff; as I’ve told you, university stuff needed to be done as well. On average, I spent 2 hours per day on that stuff (excluding Christmas and New Year). I am quite proud I was actually able to keep doing that for 2 weeks:P, and with the progress I’ve made. The whole first week I have spent on the Digital IC design project; at the end of the holidays we had all the cells except the delay element, although the counter wasn’t fully functional yet. I have also spent some time on the Systems Design lab; at the end of the holidays it wasn’t quite finished yet, but some progress has been made. One day I have spent on my essay; I read it through, and made some drastic changes and it is a bit better now:) I worked a bit on the Performance Analysis homework, however I didn’t finish it completely.

So far the holidays, so long my friend. I already have undergone another week of university stuff:P This past week my focus was primarily on the IC design project (which resulted in 4 days of at least 4 hours working in the lab room with my colleague), since the deadline of the midterm report was last Friday. We finished the design of the cells; we changed the counter design (old design couldn’t be asynchronously resetted) and we have decided to use an inverter as the delay element. Unfortunately, the design we had first chosen had a maximum possible resolution of around 16 ps (a TDC measures the time between 2 pulses, a start and a stop. The resolution is the smallest amount of time it can measure). This would fulfill the requirement of 30 ps, but according the the teacher, people from last years achieved resolutions of around 2 to 10 ps. Therefore we have worked on a second design which can achieve a resolution between 2 to 5 ps. This cost us a good 2 days. The rest of the time we have spent working on simulations and writing the midterm report. I am quite happy with our progress so far, however quite some work lies ahead still. The good thing, though, is that now I understand what our design will be, I am actually having some fun doing this project!:)

I have also spent some more time on de System Design lab. It is almost finised, however I’m having a weird result, which I have asked/mailed the teacher about. After that is resolved, all that there is left to do is to compile a report for the oral exam. I also finished the Performance Analysis homework (5th and 6 assignment), so I’m done with those homework assignments:D Lastly, last Friday I handed in my Essay. I reread it once more, and changed a few small things and then I handed it in. I’m hoping for at least a pass, possibly a high pass, meaning this part is finally finished:)

Coming week I have nothing planned, which means I can prepare for my exams. I have the oral exam for System Design on Tuesday the 19th of January, the Performance Analysis Exam on Friday the 22nd of January and the IC Design exam on Wednesday the 27th of January. The oral exam consists of 15 minutes answering questions about the material, 10 minutes of presenting an idea of a paper and 5 minutes discussing the lab.I still have to prepare the first 2 parts. For IC Design I already studied some material, but I still have to study it carefully. The same goes for Performance Analysis. A lot of studying to do the next 3 weeks;) Coming week I will focus mainly on System Design and a bit on Performance Analysis. Next week, after the Oral exam, I will focus on P.A.. The week after will be fully for IC Design. I still need to work on the IC Design project inbetween though.

That’s it for now, thanks for reading:) I hope to be back with my next blog the weekend after my exams. Wish me good luck:)! Cheers!

Blog 4: Time for well-deserved holidays :)

Hi guys (so fancy, this bold part),

I made it: I’m writing a blog before my holidays start:) Before I start, a fellow CE student is also writing a blog; you can find his blog here It could be worth to go see his blog too, to see another insight into CE. I recommend you all to check his blog out!

I finally got some results from Q1 back, yeey. I passed the MCA course with an 8, which I’m satisfied with. The oral defense for ACS went better than expected, partly due to the fact that the teacher was happy with our results (which I didn’t expect at all!). He didn’t give us an actual grade, but he told us we passed and with quite a good grade (8 – 9). Lastly, I got the result for my final presentation: an 8:) I passed all three courses of Q1 apparently, I am quite happy with that. It has been pretty rough at times, but in the end (apparently) it was worth it.

Let me update you on the goals I set in my last blog.

I handed in a draft version of my essay and it has been peer-reviewed. According to a fellow student my draft was quite good already, but he had some pointers for me. Yesterday I met with my Scientific Writing teacher to discuss these pointers. Overall, the essay is looking good, but some changes need to be made before I will upload my final essay.

I have started with the System Design lab. I have a good understanding what is expected from me. I am not sure I could say I’m “well on my way”, but I think it will be alright as long as I put time and effort into it. Look at the image below for a part of the lab. It’s a program consisting of additions/subtractions and multiplications which needs to be scheduled. The image shows the toolbox used to get a visual of the scheduled program.

Blog_SD(Toolbox is provided by Dr. Ir. Rene van Leuken for the ET4054 course)

My second IC design assignment has been signed off. Moreover, I have started with the lab together with my colleague. Our lab assignment consists of designing a Time to Digital Converter (TDC). We have decided on an architecture (several architectures exist) and we have started with the design of the cells (we cannot use standard cells). See the image below for our design of a 3-input nand together with testing results (green line is the output, the other 3 lines are the input).

Blog_IC_Schematic (Design is made in Virtuoso, made by Cadence)


Performance Analysis has been quite the same. I have finished all homework assignments up to assignment 4. Last week we had queueing theory, which was pretty interesting.

Overall, I am satisfied with my progress the last weeks. The last weeks combined with the rough first quarter make me feel that I deserved the holidays, I am so happy the holidays have finally started:D Last time I wrote some cool plans for my holidays; unfortunately I won’t do either of those! My aunt already had other plans, and it was too late to arrange other plans. I have decided I will travel to a few cities in the east of the Netherlands (it is very beautiful there with quite some old cities). After that, I will just stay with my family and enjoy the holidays.

Sad me – there is quite some university work to do for me. First of all, I have to work on the System Design lab – the deadline is the day of my oral exam, which is 19 January. Therefore, I don’t need to finish it during the holidays, but I plan to make good progress on it. Secondly, I need to finish all the cells for my IC design project (flip flops, counter, delay element and possibly more). I also need to write a midterm report for the lab. This report is due the 8th of January, so I should make progress during the holidays. Thirdly, I want to finish my essay (deadline 8th of January); this should not take too much time, but it will take some time. Lastly, I’m planning to do the fifth homework assignment of Performance Analysis.

So yeah, quite some work is ahead of me. However, there is also Christmas and New Year’s Eve, which will be fun. Most definitely I will visit some places, or go out to do fun things. And of course, lots of gaming will be done:) I don’t have a choice, do I? I have to unwind before I can start working on the things that need to be done, since my brain is almost exploding at the moment:P

That’s it for now (finally?). I wish everyone relaxing and amazing holidays, Happy Christmas days and a happy New Year (be safe with fireworks!). I hope to welcome you all back after the holidays with my next blog:)


Blog 3: Not so occupied, yet!

Hiya folks,

that was fast;) This quarter is not killing me with lots of work yet, fortunately, and that means I have time for the next blog:)!

I am stil waiting for my results of Q1, so I can’t tell you how it went as of now. What I am still waiting for: ASC Lab 2 and 3 results, MCA Reading assignment and lab results and Academic skills final presentation result. As you can see, that is quite a lot sadly. Next week Tuesday I have my lab defense of ACS, so I’ll probably get the ACS results then:)! I’m a bit nervous of it though. Apparently lots of groups had troubles with Lab 3, so that makes me a bit less worried:P.

So what have I been doing the last weeks and why didn’t it (barely) kill me you might wonder;) Well, mostly following lectures and working on assignments.

For Academic skills I have been quite busy with my essay. Last week Sunday was the deadline for my introduction. I was quite satisfied with it, and so were my teacher and the student peer-reviewing me; good start of my essay I’d say:)! The past weekend I have been working further on my essay. Currently I have roughly half of the required 1500 words. I have a good idea what I want to write with the remaining 700-800 words, so that should not be a problem. Deadline for this is Tuesday in 2 weeks by the way. I still want my final presentation grade though:(

Methods and Algorithms for System Design (let’s call it S.D.) has been following lectures mostly up till now. It has been more interesting lately as well, so that’s nice! I finally have access to the lab environment (remote access, meaning I can work on it at home or where ever I want), so that means I should start working on the lab. And that’s exactly what I was planning for tomorrow (and possibly Wednesday as well). I think that this lab is doable, if I put some effort and time into it.

Digital IC Design (let’s call it I.C.) has been the same as the beginning to be honest; the lectures are still intensive but interesting (lectures on combinational- and sequential logic were kind of a repetition from one of my bachelor courses though;)) Last week I signed off my first lab assignment (yeey) and I have been working on the second lab assignment (due this Friday). I and my partner are well on our way; we just need to get over some small bumps. I think we will be able to finish it before Friday; I will look at it Wednesday after the S.D. lab!

Performance Analysis (let’s call it P.A.) has been the same as well, except another PHD’er gave the last lecture, and will give the remaining lectures until the holiday starts (woohoo holiday). The first homework assignment went okay, except I made a small and stupid mistake. The second homework assignment went a bit better I guess, but the answers aren’t online yet. It’s still quite a lot of mathematics (more specifically stochastic processes), but the link with networks is becoming clearer, which is nice since that’s the reason we need to know these stochastic processes;)

Apparently I have enough to do until the holidays start. My goals, before it starts, are: Hand in a draft version of my essay, be well on my way with the S.D. lab, signed off assignment 2 of I.C. and started with the lab, finish all the homework assignments of P.A. and lastly, get all my results for Q1 (and pass ACS!!). Wow, that is depressing:P

After that, the holidays are finally there. I haven’t fully decided what my plans are. I’m thinking about going to my family in Limburg for a few days/a week. I’m also thinking about going to Germany with a friend (we did that last year; we went to the Japanese neighbourhood in Düsseldorf and it was a lot of fun). But maybe I’ll go to Singapore. Who knows, lots of things to do; I will have to decide that during the next weeks. What I do know is, however, that I really need some vacation. Q1 wore me out pretty much, and I have a feeling that the coming weeks will do the same. Regardless of where I will be, I will definitely take a good rest and make enough time to polish my gaming skills (not dropping out of Gold in League of Legends would be my main goal:)). Maybe it will snow and freeze and I can play on the ice, that would be awesome too:) And watch a lot of anime, too, of course. Obviously I will also work on my I.C. lab; Thursday after the holidays a mid-term design rapport needs to be handed in:(

Anyway, I can’t wait for the holidays, but I’ll work hard the coming weeks first. I suggest you all do the same, that way the holidays feel more deserved and are way nicer:) See you next time; probably just before the almighty holidays start!

Blog 2: Starting Q2

Hey guys (and girls),

not exactly 2 weeks later as I said, but here I am. I was so occupied with finishing the first quarter, that I didn’t have the time to write a blog.

Finishing all the courses of Q1 took some more time than expected, since my deadlines were postponed; one even to the end of the first week in Q2! Luckily, I have a decent feeling about it. For the Networking course I already received the result for my exam: an 8. -> first 5 ECTS of my master in my pocket:).

For the MCA course, I have finished writing the paper and the second lab assignment. I’m really proud of my work, and I think it will get a good grade. I have talked with the teacher, Sorin Cotofana, about the paper; he asked us some questions, like why did we choose this topic, why do we think that method A is better etc. He told us that the paper looked good, but we will have to wait for our grade. The second lab assignment took us quite some time, since running a simulation took easily over 2 hours. My colleague and I spent almost whole week 1.10 on this lab assignment. Afterwards we had a talk with one of the assistants; he also asked us some questions about our design choices. That went pretty well too, so I think I passed this course:).

For the ACS course, we just handed in the report last Sunday. The assignment was pretty hard and I’m not sure our report is sufficient, guess we will have to wait. We will also have a discussion with the teacher, Zaid Al-Ars, about the lab assignments. Let’s see how that goes;) I got 430 out of 500 points for the homework assignments and a 8.5 for the first lab assignment so I still have hope on passing this course!

The second quarter has started already and so do my courses. I have chosen three courses, meaning that I have again four courses (I still have Profile Orientation and Academic Skills). The courses I’ve chosen are: Methods and Algorithms for System Design (Track core), Digital IC Design and Performance Analysis (Specialization core).

M&ASD is about algorithms for system design. So far, the course isn’t that intensive and is mostly about algorithms and synthesization of a program. I think that the course is not so interesting yet, but that’s probably because it just started. We will have to do a lab assignment and I will have an oral examination for this course.

Digital IC Design is about the design of an Integrated Circuit; a big part of this course is the lab which has not started yet. Before we can start with the lab, we have to pass 2 assignments in which you can get used to the tools you will need to use in the lab. I finished the first assignment already with my colleague which we will be, hopefully, signed off next week. Besides the lab, there are also lectures and a written exam. The lectures so far are about the workings of transistors and an inverter, and are quite intensive but interesting.

Performance Analysis heavily focuses on stochastic processes meaning mathematics. There is only 1 lecture per week, which results in the teacher going over the material quite rapidly. The course is therefore quite intensive. Every week, a homework assignment is uploaded which will give you bonus points upon completion. I haven’t started yet, so I’m not sure about the level of the assignments. There is also a written exam for this course.

Yesterday I joined the Master Event as a promoter for Computer Engineering for the first time. It was quite fun, although my legs were almost dead after standing for 6 hours;) There were a lot of people there, but unfortunately I didn’t get to talk with a lot of them. On the other hand, 26 people attended the presentation by our coordinator Arjan van Genderen; hopefully I will see a few of them next year.

A question I got a lot yesterday, was: “What is the difference between CE and Embedded Systems?”. Since this is an interesting question, I decided to explain it here. For me, an important difference is the amount of choices you can make in CE; there are only 2 compulsory courses and for the rest you can choose, to some extent, the rest of your courses. Both CE and ES are inbetween Electrical Engineering (hardware) and Computer Science (software); the difference between them is that CE focuses a bit more on hardware, while ES focuses a bit more on software. However, there are enough software related courses in CE! A lot of the specialization courses are the same for CE and ES, however the track core of CE is what makes CE, CE. Therefore I would say, that if the track core of CE appeals to you, then CE is the right option for you. If, however, it does not, maybe ES is better for you (given that you like the compulsory courses of ES;)).

Well, that’s it for me this time. I’ll be working hard the coming weeks; the Digital IC Design lab will start, and so does the M&SD lab. I will also work on the essay I need to write for Profile Orientations. Hopefully I will be writing my next blog in a few weeks, before the Christmas Holidays. Till then!

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